Conception and characterization of CMOS sensors for particle physics pixel detectors

Bhat, Siddharth

Published January 10, 2022 | Version v1

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Conception and characterization of CMOS sensors for particle physics pixel detectors

Bhat, Siddharth¹

1. AixMarseille U

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Supervisor (2):

1. AixMarseille U
2. Marseille CPPM

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Translated title: Conception et caractérisation de capteurs CMOS pour détecteur pixel en physique des particules

CDS: 2799651
CDS Report Number: CERN-THESIS-2019-432

Department: EP - Experimental Physics Department
Programme: No program participation
Accelerator: CERN LHC
Experiment: ATLAS

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Resource type: Thesis
Thesis: The ATLAS experiment will start operating at the High Luminosity LHC accelerator (HL-LHC) in 2026 to increase the probability of new discoveries. To cope with the ATLAS requirements in terms of radiation hardness, readout speed, and granularity at the HL-LHC, the replacement of the present ATLAS Inner Tracker (ITk) is needed. Depleted CMOS monolithic pixel detector technology has been one of the options considered for the outer layer of an upgraded ATLAS pixel detector and is a high potential technology for future pixel detectors. This thesis focused on the implementation of new designs in the depleted CMOS, and its application in the ATLAS upgrade framework. A monolithic sensor based on depleted CMOS technology offers various advantages such as less production time, lower material budget and lower cost in contrast to the traditional hybrid pixel detector. Within the ATLAS HV/HR collaboration, several prototypes have been developed using different depleted CMOS technologies, for instance, LFoundry (LF) 150 nm, TowerJazz (TJ) 180 nm and austriamicrosystems AG (AMS) 180 nm. These prototypes are studied for charge collection, the influence of electronics on the sensing part in this integrated technology, but also versus radiation. Scaling down the devices makes integrated circuits susceptible to soft errors normally caused by alpha particle or neutron hits. These events of radiation strike resulting in bit upsets are referred to as Single Event Upsets (SEU), which become of concern for reliable circuit operation. Several test-chips in AMS, TowerJazz and LFoundry technologies with different SEU tolerant structures have been prototyped and tested. The SEU tolerant structures were designed with appropriate electronics simulations using Computer Aided Design (CAD) tools in order to study the sensitivity of injected charge to upset a memory state. Furthermore, these structures were made more tolerant to the upset by doing special SEUhard layouts. All three prototypes which were designed were fully functional and were characterized in the laboratory. The AMS SEU tolerant chip was also exposed to 24 GeV protons at Proton Synchrotron in CERN to measure the SEU cross-section. For the ATLAS ITk Phase-II Pixel upgrade one of the main challenges is a low mass, efficient power distribution to power detector modules. An alternative powering scheme named Serial Powering scheme is foreseen for the future Inner Tracker (ITk) detector of the ATLAS experiment. To meet the requirements of the ATLAS experiment to the environment of a pixelated layer in a high radiation collider environment, new developments with depleted CMOS sensors have been made in Shunt-LDO regulator and sensor biasing which are designed in modified TowerJazz 180 nm CMOS imaging technology. The proposed regulator has a modular structure that allows better power management and heat dissipation. 5 Regulators are also required to work in a parallel scheme for redundancy in case of power failure. Moreover, in the TowerJazz modified process, two different voltage levels are used for the purpose of sensor depletion. The bias voltages are generated by using a negative charge pump circuit. Beyond participating in the new designs of the depleted CMOS, I was involved in the IC characterization of these prototypes in the laboratory, as well as multiple irradiation campaigns at Proton Synchrotron in CERN. While exposing the prototypes under the proton beam, the main focus was the investigation of the irradiation hardness. TID and NIEL effects on the electronics and sensor could be performed by characterization of the front-end : measuring the pre-amplifier amplitude, threshold scans, TDAC tuning, leakage current, etc., Submitted: 2019, Defended: 2019-09-03
Languages: English

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Created: January 14, 2022
Modified: October 29, 2025

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CERN-THESIS-2019-432.pdf

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CERN

Conception and characterization of CMOS sensors for particle physics pixel detectors

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CERN-THESIS-2019-432.pdf

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