A compact pre-processor system for the ATLAS level-1 calorimeter trigger

This thesis describ es the researc h whose aim is to dev elop a compact Pre-Pro cessor system for the A TLAS Lev el-1 Calorimeter T rigger. Con tributions to the p erformance and the arc hitecture of the Pre-Pro cessor w ere made. A demonstrator Multi-Chip Mo dule (PPrD- MCM) w as dev elop ed and assem bled whic h p erforms most of the prepro cessing of four analogue trigger-to w er signals. The prepro cessing includes digitisation to 8-bit precision, iden ti cation of the corresp onding bunc h-crossing in time (BCID), calibration of the transv erse energy , readout of ra w trigger data, and high-sp eed serial data transmission to the trigger pro cessors. The demonstrator Multi-Chip Mo dule has a size of 15.9 cm 2 and it consists of 9 dies. The MCM w as designed with a smallest feature size of 100 m and it w as fabricated in a laminated MCM-L pro cess o ered b yW urth Elektronik. A Flip-Chip in terconnection ASIC (Finco) w as dev elop ed for the PPrD-MCM and fabricated in a 0.8 m BiCMOS- pro cess o ered b y Austria Micro Systems (AMS). This ASIC has doubled the serial link sp eed and it is Flip-Chip moun ted on the MCM substrate. A BCID algorithm for saturated trigger-to w er signals and a bunc h-crossing m ultiplexing sc heme (BC-m ux) whic h doubles the e ectiv e bandwidth of the high-sp eed serial data transmission w ere dev elop ed. The PPrD-MCM w as tested as part of a mo dular Pre- Pro cessor test system, where transmission and readout tests ha v e sho wn the feasibilit y of building a compact Pre-Pro cessor system aimed at pro cessing 64 trigger to w er signals p er VME b oard.